A design method and an FPGA-based prototype implementation of massively parallel systolic-array VLSI architectures for 2nd-order and 3rd-order frequency-planar beam plane-wave filters are proposed. Frequency-planar beamforming enables highly-directional UWB RF beams at low computational complexity compared to digital phased-array feed techniques. The array factors of the proposed realizations are simulated and both high-directional selectivity and UWB performance are demonstrated. The proposed architectures operate using 2's complement finite precision digital arithmetic. The real-time throughput is maximized using look-ahead optimization applied locally to each processor in the proposed massively-parallel realization of the filter. From sensitivity theory, it is shown that 15 and 19-bit precision for filter coefficients results in better than 3% error for 2nd- and 3rd-order beam filters. Folding together with Ktimes multiplexing is applied to the proposed beam architectures such that throughput can be traded for K-fold lower complexity for realizing the 2-D fan filter banks. Prototype FPGA circuit implementations of these filters are proposed using a Virtex 6 xc6vsx475t-2ff1759 device. The FPGA-prototyped architectures are evaluated using area (A), critical path delay (T), and metrics AT and AT2. The L2 error energy is used as a metric for evaluating fixed-point noise levels and the accuracy of the finite precision digital arithmetic circuits.

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realtime throughput 15 highlydirectional uwb rf beams frequencyplanar beamforming fixedpoint noise levels l2 error energy uwb performance fpgabased prototype implementation 2s complement finite precision digital arithmetic computational complexity filter from sensitivity ktimes multiplexing digital phasedarray feed techniques fpga circuit implementations highdirectional selectivity area a critical path delay t fpgaprototyped architectures 2ndorder and 3rdorder frequencyplanar beam planewave filters array factors massivelyparallel realization virtex 6 xc6vsx475t2ff1759 device accuracy massively parallel systolicarray vlsi architectures lookahead optimization

Soumya Kondapalli,Arjuna Madanayake,Len Bruton,.Digital Architectures for UWB Beamforming Using 2D IIR Spatio-Temporal Frequency-Planar Filters. 2012 (),.

Soumya Kondapalli,Arjuna Madanayake,Len Bruton,"Digital Architectures for UWB Beamforming Using 2D IIR Spatio-Temporal Frequency-Planar Filters" 2012

Soumya Kondapalli,Arjuna Madanayake,Len Bruton,"Digital Architectures for UWB Beamforming Using 2D IIR Spatio-Temporal Frequency-Planar Filters"