Advanced Electronic Materials | Vol.4, Issue.4 | | Pages
Boolean and Sequential Logic in a One‐Memristor‐One‐Resistor (1M1R) Structure for In‐Memory Computing
Memristive devices acting as high‐performance in‐memory computing fabrics have attracted much attention for nonvolatile parallel architectures to break the von Neumann bottleneck. Here, for the first time, a nonvolatile digital logic system with three‐terminal Pt/SiO2/Pt/Ag/GeTe/Ta one‐memristor‐one‐resistor (1M1R) structure is presented. Programmable nonvolatile Boolean logic gates and clocked sequential logic blocks including D latch and D flip‐flop are experimentally implemented, based on which a 4‐bit linear‐feedback shift register with timing design is functionally verified in simulation. With information generation, processing, transmission, and storage performing within the same 1M1R‐based logic blocks, these results consolidate the feasibility of building memristive digital computing system for future non‐von Neumann computing.
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Boolean and Sequential Logic in a One‐Memristor‐One‐Resistor (1M1R) Structure for In‐Memory Computing
Memristive devices acting as high‐performance in‐memory computing fabrics have attracted much attention for nonvolatile parallel architectures to break the von Neumann bottleneck. Here, for the first time, a nonvolatile digital logic system with three‐terminal Pt/SiO2/Pt/Ag/GeTe/Ta one‐memristor‐one‐resistor (1M1R) structure is presented. Programmable nonvolatile Boolean logic gates and clocked sequential logic blocks including D latch and D flip‐flop are experimentally implemented, based on which a 4‐bit linear‐feedback shift register with timing design is functionally verified in simulation. With information generation, processing, transmission, and storage performing within the same 1M1R‐based logic blocks, these results consolidate the feasibility of building memristive digital computing system for future non‐von Neumann computing.
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4bit linearfeedback shift register sequential logic blocks storage nonvolatile parallel architectures von neumann bottleneck boolean logic gates devices information generation processing transmission nonvolatile digital logic system nonvon neumann computing highperformance inmemory computing fabrics threeterminal ptsio2ptaggeteta onememristoroneresistor 1m1r structure timing design
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Ya‐Xiong Zhou , Yi Li , Nian Duan , Zhuo‐Rui Wang , Ke Lu , Miao‐Miao Jin , Long Cheng , Si‐Yu Hu , Ting‐Chang Chang , Hua‐Jun Sun , Kan‐Hao Xue , Xiang‐Shui Miao,.Boolean and Sequential Logic in a One‐Memristor‐One‐Resistor (1M1R) Structure for In‐Memory Computing. 4 (4),.
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